include cnt1 equ 0 ; define a variable named cnt1 at address 0 cnt2 equ 1 ; cnt2 is at address 1 org 0 init: clrf TRISB ; make PORT B pins outputs main_loop: bsf PORTB,7 ; turn led on call wait bcf PORTB,7 ; turn led off call wait bra main_loop ; ; wait for 256*256 loops ; each inner loop is 3 cycles ; at 2MHz this is about 0.4 second ; wait: clrf cnt1 ; cnt1 = 0 clrf cnt2 ; cnt2 = 0 waitloop: decfsz cnt1,f ; if (--cnt1) bra waitloop ; then loop decfsz cnt2,f ; if (--cnt2) bra waitloop ; then loop return end